Data
LDR 0001

Load a binary value directly into a register. The value is written as an 8-bit binary number.

LDR Rdest value
Example
# Load 5 (00000101) into R1
LDR R1 00000101
Arithmetic
ADD 0010

Add two registers together and store the result in a third register.

ADD Ra Rb Rdest
Example
# R3 = R1 + R2
ADD R1 R2 R3
SUB 0011

Subtract the second register from the first (Ra − Rb) and store the result in a third register.

SUB Ra Rb Rdest
Example
# R3 = R1 - R2
SUB R1 R2 R3
Bitwise Logic
AND 0100

Bitwise AND two registers. Each output bit is 1 only if both input bits are 1.

AND Ra Rb Rdest
Example
# R3 = R1 AND R2
AND R1 R2 R3
OR 0101

Bitwise OR two registers. Each output bit is 1 if either input bit is 1.

OR Ra Rb Rdest
Example
# R3 = R1 OR R2
OR R1 R2 R3
NAND 0110

Bitwise NAND two registers. The inverse of AND — each output bit is 0 only if both input bits are 1.

NAND Ra Rb Rdest
Example
# R3 = R1 NAND R2
NAND R1 R2 R3
XOR 0111

Bitwise XOR two registers. Each output bit is 1 if the input bits are different.

XOR Ra Rb Rdest
Example
# R3 = R1 XOR R2
XOR R1 R2 R3
Control Flow
JMP 1001

Unconditionally jump to a memory address. Execution continues from that instruction onward. The address is an 8-bit binary value.

JMP address
Example
# Jump to address 00000000 (start)
JMP 00000000
HLT 1000

Halt the computer. Execution stops immediately. Every program should end with HLT.

HLT
NOP 0000

No operation. The computer does nothing for one clock cycle. Useful for timing or padding.

NOP
Output
SCR 1010

Output the value of a register to the screen display.

SCR Rsrc
Example
# Display the value in R2
SCR R2
Registers (R1 – R15)

There are 15 general-purpose registers, R1 through R15. Each holds a 4-bit value. Any register can be used as a source or destination in any instruction.

R10001
R20010
R30011
R40100
R50101
R60110
R70111
R81000
R91001
R101010
R111011
R121100
R131101
R141110
R151111